Shamika Chalse

DR. VISHWANATH KARAD MIT WORLD PEACE UNIVERSITY, PUNE • Computer

59 Circuits

011 sequence detector practice

011 sequence detector practice

74LS76 74LS08 74LS04

10101 sequence generator practice

10101 sequence generator practice

101 practise

101 practise

74LS76 74LS04 74LS08 74LS11

EXP 5 110 old circuit

EXP 5 110 old circuit

74LS76 74LS04 74LS08

101 sequence detector practice

101 sequence detector practice

74LS76 74LS08 74LS04

11011 without bushing( 2 and 5 state r not executing)

11011 without bushing( 2 and 5 state r not executing)

74LS76 74LS08 74LS32

Exp 6

Exp 6

Exp 5 Q1

Exp 5 Q1

74LS76 74LS04 74LS08

exp 5

exp 5

74LS76 74LS04 74LS08

Practical Exam : 4-Bit Binary to Gray Code

Practical Exam : 4-Bit Binary to Gray Code

lab assig 3 full adder using 3:8 decoder practice

lab assig 3 full adder using 3:8 decoder practice

lab assig 3 3 bit MOD 8 Up counter

lab assig 3 3 bit MOD 8 Up counter

lab assig 2 error 8:1 using 4:1 reduction

lab assig 2 error 8:1 using 4:1 reduction

74LS04 74LS153 74LS08

lab assig 2 reduction for 8:1 mux using 4:1 mux ,f(A,B,C)=sumation(0,2,4,7)

lab assig 2 reduction for 8:1 mux using 4:1 mux ,f(A,B,C)=sumation(0,2,4,7)

74LS04 74LS153 74LS32

lab assig 4 , 3 bit synchronous counter UP counter practice

lab assig 4 , 3 bit synchronous counter UP counter practice

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