NOR gate implementation with OR and NOT gate

Appus
Appus Devis
Created on Jun 16, 2021 0 0 3
NOR gate implementation with OR and NOT gate
100%

Integrated Circuits Used

Procedure

  1. Add IC 74LS32 into ICBase-1 (74LS32).
  2. Add IC 74LS04 into ICBase-2 (74LS04).
  3. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS32).
  4. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS04).
  5. Connect Pin-1 (Input) of ICBase-1 (74LS32) to Input-15.
  6. Connect Input-14 to Pin-2 (Input) of ICBase-1 (74LS32).
  7. Connect Pin-1 (Input) of ICBase-2 (74LS04) to Pin-3 (Output) of ICBase-1 (74LS32).
  8. Connect Output-15 to Pin-2 (Output) of ICBase-2 (74LS04).
  9. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS32).
  10. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS04).
  11. Add IC 74LS02 into ICBase-3 (74LS02).
  12. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS02).
  13. Connect VCC Port to Pin-20 (VCC) of ICBase-3 (74LS02).
  14. Connect Input-14 to Pin-3 (Input) of ICBase-3 (74LS02).
  15. Connect Input-15 to Pin-2 (Input) of ICBase-3 (74LS02).
  16. Connect Output-14 to Pin-1 (Output) of ICBase-3 (74LS02).
  17. Connect GND Port to ICBase-3 (74LS02).