2-Bit Asynchronous DOWN Counter using 74LS76

Step-by-Step Procedure

1. Click on 'Next' button to Add IC-74LS76
2. Click on 'Next' button to Connect GND and VCC of IC
3. Click on 'Next' button to Connect J-1 to Vcc
4. Click on 'Next' button to Connect K-1 to Vcc
5. Click on 'Next' button to Connect CLOCK-1 to Automatic Clock Port
6. Click on 'Next' button to Connect PR-1 to Vcc
7. Click on 'Next' button to Connect Q-1 to LSB of 7-Seg Display
8. Click on 'Next' button to Connect CLEAR-1 to Input Pin-1
9. Click on 'Next' button to Connect -Q1 (Pin 14) to CLOCK-2
10. Click on 'Next' button to Connect J-2 to Vcc
11. Click on 'Next' button to Connect K-2 to Vcc
12. Click on 'Next' button to Connect PR-2 to Vcc
13. Click on 'Next' button to Connect CLEAR-2 to Input Pin-1
14. Click on 'Next' button to Connect Q-2 to MSB of 7-Seg Display

Block Diagram

ICs used in this circuit with pin diagram

74LS76

No preview

74LS76

Dual Master-Slave J-K Flip-Flops with Clear, Preset, and Complementary Outputs

Related Logic-Gate Circuit Tutorials

4 bit Synchronous DOWN counter using JK Flip flops 74LS76

DeldSim Admin

0

74LS76 74LS08

4 bit Synchronous UP counter using JK Flip flops 74LS76

DeldSim Admin

0

74LS76 74LS08

3-Bit Asynchronous DOWN Counter using 74LS76

DeldSim Admin

0

74LS76

Decade 4-bit Synchronous counter using 74LS76

DeldSim Admin

0

74LS76 74LS08 74LS32

3-Bit Asynchronous UP Counter using 74LS76

DeldSim Admin

0

74LS76

4-Bit Asynchronous UP Counter using 74LS76

DeldSim Admin

0

74LS76

4-Bit Asynchronous DOWN Counter using 74LS76

DeldSim Admin

0

74LS76

To Design and Verify the operation BCD ripple counter using JK flip-flops

DeldSim Admin

0

74LS00 74LS76

2-Bit Asynchronous UP Counter using 74LS76

DeldSim Admin

0

74LS76