EVEN & ODD PARITY GENERATOR

Anish
Anish Dhawalikar
• Created on Dec 14, 2020 • 0 • 0 • 2
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EVEN & ODD PARITY GENERATOR
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Integrated Circuits Used

74LS86 74LS04

Procedure

  1. Add IC 74LS86 into ICBase-2 (74LS86).
  2. Add IC 74LS04 into ICBase-1 (74LS04).
  3. Connect Output-13 to Pin-2 (Output) of ICBase-1 (74LS04).
  4. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS04).
  5. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS86).
  6. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS86).
  7. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS04).
  8. Connect Input-1 to Pin-1 (Input) of ICBase-2 (74LS86).
  9. Connect Input-2 to Pin-2 (Input) of ICBase-2 (74LS86).
  10. Connect Pin-4 (Input) of ICBase-2 (74LS86) to Pin-3 (Output) of ICBase-2 (74LS86).
  11. Connect Input-3 to Pin-5 (Input) of ICBase-2 (74LS86).
  12. Connect Pin-1 (Input) of ICBase-1 (74LS04) to Pin-6 (Output) of ICBase-2 (74LS86).
  13. Connect Input-1 to Pin-19 (Input) of ICBase-2 (74LS86).
  14. Connect Input-2 to Pin-18 (Input) of ICBase-2 (74LS86).
  15. Connect Pin-16 (Input) of ICBase-2 (74LS86) to Pin-17 (Output) of ICBase-2 (74LS86).
  16. Connect Input-3 to Pin-15 (Input) of ICBase-2 (74LS86).
  17. Connect Output-4 to Pin-14 (Output) of ICBase-2 (74LS86).