SR FLIP FLOP

TEJAS
TEJAS PORWAL
• Created on Jan 20, 2021 • 0 • 0 • 1
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SR FLIP FLOP
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Integrated Circuits Used

74LS00

Procedure

  1. Add IC 74LS00 into ICBase-1 (74LS00).
  2. Connect Input-15 to Pin-1 (Input) of ICBase-1 (74LS00).
  3. Connect Pin-3 (Output) of ICBase-1 (74LS00) to Pin-18 (Input) of ICBase-1 (74LS00).
  4. Connect Manual clock Port to Pin-2 (Input) of ICBase-1 (74LS00).
  5. Connect Pin-4 (Input) of ICBase-1 (74LS00) to Manual clock Port.
  6. Connect Input-14 to Pin-5 (Input) of ICBase-1 (74LS00).
  7. Connect Pin-16 (Input) of ICBase-1 (74LS00) to Pin-6 (Output) of ICBase-1 (74LS00).
  8. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS00).
  9. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS00).
  10. Connect Output-14 to Pin-17 (Output) of ICBase-1 (74LS00).
  11. Connect Pin-19 (Input) of ICBase-1 (74LS00) to Pin-14 (Output) of ICBase-1 (74LS00).
  12. Connect Pin-17 (Output) of ICBase-1 (74LS00) to Pin-15 (Input) of ICBase-1 (74LS00).
  13. Connect Output-13 to Pin-14 (Output) of ICBase-1 (74LS00).
  14. Connect Pin-18 (Input) of ICBase-1 (74LS00) to ICBase-1 (74LS00).