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Rishith.S.
BMS COLLLEGE OF ENGINEERING • Computer
20 Circuits
mod 6 up counter
Rishith.S.
0
0
Nov 2, 2026
74LS76
mod 4 up counter (jk )
Rishith.S.
0
0
Nov 2, 2026
74LS76
mod 5 sync up counter (jk)
Rishith.S.
0
0
Nov 2, 2026
74LS08
74LS76
Full subtractor (difference and borrow)
Rishith.S.
0
0
Oct 5, 2026
74LS86
74LS04
74LS08
74LS32
Half subtractor (sum and carry)
Rishith.S.
0
0
Oct 5, 2026
74LS86
74LS04
74LS08
Full adder (sum and carry)
Rishith.S.
0
0
Oct 5, 2026
74LS86
74LS08
74LS32
Half adder (sum and carry)
Rishith.S.
0
0
Oct 5, 2026
74LS86
74LS08
NOR (AND OR NOT)
Rishith.S.
0
0
Oct 4, 2026
74LS02
NAND ( AND OR NOT )
Rishith.S.
0
0
Oct 4, 2026
74LS00
(A+B)(B' + C)
Rishith.S.
0
0
Sep 28, 2026
74LS04
74LS32
74LS08
AB+AC
Rishith.S.
0
0
Sep 28, 2026
74LS08
74LS32
A+A'B = A+B
Rishith.S.
0
0
Sep 28, 2026
74LS04
74LS32
74LS08
(A.B)'= A' + B'
Rishith.S.
0
0
Sep 28, 2026
74LS08
74LS04
74LS32
(A+B)'= A'.B'
Rishith.S.
0
0
Sep 28, 2026
74LS04
74LS32
74LS08
AB' + AC
Rishith.S.
0
0
Sep 21, 2026
74LS04
74LS08
74LS32
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