Devansh

ADANI INSTITUTE OF INFRASTRUCTURE ENGINEERING • Computer

11 Circuits

XOR gate

XOR gate

NOR gate

NOR gate

NAND gate

NAND gate

OR gate

OR gate

AND gate

AND gate

NOT gate

NOT gate

Exp 6: Design and development of full subtractor logic and verify it

Exp 6: Design and development of full subtractor logic and verify it

74LS86 74LS04 74LS08 74LS32

Exp 5 :Design & deployment of half subtractor logic and verify it

Exp 5 :Design & deployment of half subtractor logic and verify it

74LS86 74LS04 74LS08

Exp 4:Design & development of full adder logic and verify it

Exp 4:Design & development of full adder logic and verify it

74LS86 74LS08 74LS32

Exp 3:Design & development of half adder logic and verify it

Exp 3:Design & development of half adder logic and verify it

Exp 7 : To verify truth table of Binary to Gray code converter

Exp 7 : To verify truth table of Binary to Gray code converter

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