SHREYA MI

Shreya
Shreya Dhaygude
• Created on Jul 17, 2025 • 0 • 0 • 2
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SHREYA MI
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Integrated Circuits Used

74LS10 74LS00

Description

TRIPLE NAND GATE

Procedure

  1. Add IC 74LS10 into ICBase-1 (74LS10).
  2. Connect Input-15 to Pin-1 (Input) of ICBase-1 (74LS10).
  3. Connect Pin-2 (Input) of ICBase-1 (74LS10) to Input-14.
  4. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS10).
  5. Connect Pin-7 (Ground) of ICBase-1 (74LS10) to GND Port.
  6. Connect Input-13 to Pin-19 (Input) of ICBase-1 (74LS10).
  7. Connect Output-14 to Pin-18 (Output) of ICBase-1 (74LS10).
  8. Connect Input-14 to ICBase-1 (74LS10).
  9. Connect GND Port to ICBase-1 (74LS10).
  10. Connect Output-13 to ICBase-1 (74LS10).
  11. Connect Output-14 to ICBase-1 (74LS10).
  12. Add IC 74LS00 into ICBase-2 (74LS00).