Testing the logic of NAND Gate

Amogh
Amogh Nikumb
• Created on Jul 11, 2025 • 0 • 0 • 1
Testing the logic of NAND Gate
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Integrated Circuits Used

Procedure

  1. Add IC 74LS02 into ICBase-1 (74LS02).
  2. Connect Pin-20 (VCC) of ICBase-1 (74LS02) to VCC Port.
  3. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS02).
  4. Connect Input-14 to Pin-3 (Input) of ICBase-1 (74LS02).
  5. Connect Input-15 to Pin-2 (Input) of ICBase-1 (74LS02).
  6. Connect Output-10 to Pin-1 (Output) of ICBase-1 (74LS02).
  7. Connect Output-11 to ICBase-1 (74LS02).