Identity Law for AND and OR gates

Riya
Riya Kosandar
Created on Jul 15, 2025 0 0 2
Identity Law for AND and OR gates
100%

Integrated Circuits Used

Procedure

  1. Add IC 74LS08 into ICBase-1 (74LS08).
  2. Add IC 74LS32 into ICBase-2 (74LS32).
  3. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS08).
  4. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS08).
  5. Connect Input-1 to Pin-1 (Input) of ICBase-1 (74LS08).
  6. Connect Input-2 to Pin-2 (Input) of ICBase-1 (74LS08).
  7. Connect Output-1 to Pin-3 (Output) of ICBase-1 (74LS08).
  8. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS32).
  9. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS32).
  10. Connect Input-3 to Pin-1 (Input) of ICBase-2 (74LS32).
  11. Connect Input-4 to Pin-2 (Input) of ICBase-2 (74LS32).
  12. Connect Output-2 to Pin-3 (Output) of ICBase-2 (74LS32).
  13. Connect GND Port to ICBase-1 (74LS08).
  14. Connect Input-1 to ICBase-1 (74LS08).