Implementation of OR gate using NAND Gate

Chanda
Chanda Narasimha Raju
• Created on May 25, 2025 • 0 • 0 • 1
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Implementation of OR gate using NAND Gate
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Integrated Circuits Used

74LS00

Description

This circuit describe the implementation of an OR gate using NAND Gate (2 NOT gates implemented using NAND Gate and connected to third NAND GATE).

Procedure

  1. Add IC 74LS00 into ICBase-2 (74LS00).
  2. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS00).
  3. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS00).
  4. Connect Pin-1 (Input) of ICBase-2 (74LS00) to Input-9.
  5. Connect Input-9 to Pin-2 (Input) of ICBase-2 (74LS00).
  6. Connect Input-8 to Pin-4 (Input) of ICBase-2 (74LS00).
  7. Connect Input-8 to Pin-5 (Input) of ICBase-2 (74LS00).
  8. Connect Pin-19 (Input) of ICBase-2 (74LS00) to Pin-3 (Output) of ICBase-2 (74LS00).
  9. Connect Pin-18 (Input) of ICBase-2 (74LS00) to Pin-6 (Output) of ICBase-2 (74LS00).
  10. Connect Output-4 to Pin-17 (Output) of ICBase-2 (74LS00).