D flip-flops

Shweta
Shweta Dorle
Created on Apr 22, 2025 1 0 1
D flip-flops
100%

Integrated Circuits Used

Description

positive-edge-triggered D flip-flops with complementary outputs

Procedure

  1. Add IC 74LS74 into ICBase-3 (74LS74).
  2. Connect Pin-20 (VCC) of ICBase-3 (74LS74) to VCC Port.
  3. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS74).
  4. Connect Output-3 to Pin-5 (Output) of ICBase-3 (74LS74).
  5. Connect Output-2 to Pin-6 (Output) of ICBase-3 (74LS74).
  6. Connect Clock port of 1Hz frequency to Pin-3 (Input) of ICBase-3 (74LS74).
  7. Connect VCC Port to Pin-1 (Input) of ICBase-3 (74LS74).
  8. Connect VCC Port to Pin-4 (Input) of ICBase-3 (74LS74).
  9. Connect Input-3 to Pin-2 (Input) of ICBase-3 (74LS74).
  10. Connect Output-2 to ICBase-3 (74LS74).