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Raj Singhania
PIMPRI CHINCHWAD COLLEGE OF ENGINEERING • Information Technology
9 Circuits
full adder using dual 4:1 mux
Raj Singhania
1
1
Dec 30, 2024
74LS153
74LS04
74LS32
full adder using dual 4:1 mux - Copy
Raj Singhania
1
0
Dec 30, 2024
74LS04
74LS153
74LS32
full adder using dual 4:1 mux by reduction method
Raj Singhania
2
1
Dec 30, 2024
74LS04
74LS153
full adder using dual 4:1 mux - Copy - Copy
Raj Singhania
0
0
Dec 30, 2024
74LS153
74LS32
74LS04
full adder using dual 4:1 mux by reduction method - Copy
Raj Singhania
0
0
Dec 30, 2024
74LS04
74LS153
3 bit asynchronous up counter using 7476
Raj Singhania
0
0
Dec 30, 2024
74LS76
3 bit asynchronous up counter using 7476 - Copy
Raj Singhania
0
0
Dec 30, 2024
74LS76
async down counter 7476 ic
Raj Singhania
0
0
Dec 30, 2024
74LS76
binary to grey
Raj Singhania
0
0
Dec 30, 2024
74LS86
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