JK Flipflop using NAND gates 2

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Created on Dec 14, 2024 0 0 2
JK Flipflop using NAND gates 2
100%

Integrated Circuits Used

Procedure

  1. Add IC 74LS10 into ICBase-1 (74LS10).
  2. Add IC 74LS00 into ICBase-2 (74LS00).
  3. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS10).
  4. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS10).
  5. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS00).
  6. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS00).
  7. Connect Clock port of 0.5Hz frequency to Pin-1 (Input) of ICBase-1 (74LS10).
  8. Connect Clock port of 0.5Hz frequency to Pin-3 (Input) of ICBase-1 (74LS10).
  9. Connect Input-1 to Pin-2 (Input) of ICBase-1 (74LS10).
  10. Connect Input-0 to Pin-4 (Input) of ICBase-1 (74LS10).
  11. Connect Pin-1 (Input) of ICBase-2 (74LS00) to Pin-18 (Output) of ICBase-1 (74LS10).
  12. Connect Pin-2 (Input) of ICBase-2 (74LS00) to Pin-6 (Output) of ICBase-2 (74LS00).
  13. Connect Output-1 to Pin-3 (Output) of ICBase-2 (74LS00).
  14. Connect Pin-5 (Input) of ICBase-2 (74LS00) to Pin-3 (Output) of ICBase-2 (74LS00).
  15. Connect Pin-5 (Input) of ICBase-1 (74LS10) to Pin-3 (Output) of ICBase-2 (74LS00).
  16. Connect Pin-4 (Input) of ICBase-2 (74LS00) to Pin-6 (Output) of ICBase-1 (74LS10).
  17. Connect Output-0 to Pin-6 (Output) of ICBase-2 (74LS00).
  18. Connect Pin-19 (Input) of ICBase-1 (74LS10) to Pin-6 (Output) of ICBase-2 (74LS00).