Ashmeen Kaur

Ashmeen
Ashmeen Kaur
• Created on Nov 3, 2024 • 0 • 0 • 2
Ashmeen Kaur
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Integrated Circuits Used

Description

half subtractor using nand gate and demultiplexer

Procedure

  1. Connect GND Port to Pin-1 (Input) of ICBase-1 (74LS139).
  2. Connect GND Port to Pin-8 (Ground) of ICBase-1 (74LS139).
  3. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS139).
  4. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS00).
  5. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS00).
  6. Connect Input-13 to Pin-2 (Input) of ICBase-1 (74LS139).
  7. Connect Input-12 to Pin-3 (Input) of ICBase-1 (74LS139).
  8. Connect Pin-1 (Input) of ICBase-2 (74LS00) to Pin-5 (Output) of ICBase-1 (74LS139).
  9. Connect Pin-2 (Input) of ICBase-2 (74LS00) to Pin-6 (Output) of ICBase-1 (74LS139).
  10. Connect Output-9 to Pin-3 (Output) of ICBase-2 (74LS00).
  11. Connect Pin-4 (Input) of ICBase-2 (74LS00) to Pin-5 (Output) of ICBase-1 (74LS139).
  12. Connect Pin-5 (Output) of ICBase-1 (74LS139) to Pin-5 (Input) of ICBase-2 (74LS00).
  13. Connect Output-8 to Pin-6 (Output) of ICBase-2 (74LS00).
  14. Add IC 74LS139 into ICBase-1 (74LS139).
  15. Add IC 74LS00 into ICBase-2 (74LS00).