Ashutosh Morr

PIMPRI CHINCHWAD COLLEGE OF ENGINEERING • Information Technology

21 Circuits

MOD 10 synchronous up counter using JK Flip Flop

MOD 10 synchronous up counter using JK Flip Flop

3 bit asynchronous controlled up-down counter using JK flip Flop

3 bit asynchronous controlled up-down counter using JK flip Flop

74LS76 74LS08 74LS32 74LS04

3 bit synchronous down counter using JK Flip Flop

3 bit synchronous down counter using JK Flip Flop

Full adder using NAND gates (14 NAND gates)

Full adder using NAND gates (14 NAND gates)

3 bit asynchronous down counter using MSJK FF

3 bit asynchronous down counter using MSJK FF

Binary Counter using IC -7493 MOD-16counter

Binary Counter using IC -7493 MOD-16counter

Full adder using EX-OR, AND, OR gates

Full adder using EX-OR, AND, OR gates

74LS86 74LS08 74LS32

F(A, B, C, D) =€m(0, 2,5,7,10,12) using 74153

F(A, B, C, D) =€m(0, 2,5,7,10,12) using 74153

74LS153 74LS04 74LS32

F(A, B, C, D) =€m(0, 2,5,7,10,12) implement using 74153 IC

F(A, B, C, D) =€m(0, 2,5,7,10,12) implement using 74153 IC

74LS153 74LS04 74LS32

Full adder using IC 74153

Full adder using IC 74153

Full Subtractor using Decoder 74138

Full Subtractor using Decoder 74138

74LS138 74LS32 74LS00

Full Adder Using Decoder 74138

Full Adder Using Decoder 74138

74LS138 74LS00 74LS32

3 bit Synchronous up counter using JK flip flop

3 bit Synchronous up counter using JK flip flop

3 but asynchronous up counter using JK flip flop

3 but asynchronous up counter using JK flip flop

Full adder using EXOR, AND, OR

Full adder using EXOR, AND, OR

74LS08 74LS32 74LS86

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