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NAND -> OR

Mohanlal
Mohanlal Manna
• Created on Jan 20, 2025 • 0 • 0 • 1
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NAND -> OR
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Integrated Circuits Used

74LS00

Description

3 NAND GATE USE

Procedure

  1. Add IC 74LS00 into ICBase-1 (74LS00).
  2. Add IC 74LS00 into ICBase-2 (74LS00).
  3. Add IC 74LS00 into ICBase-3 (74LS00).
  4. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS00).
  5. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS00).
  6. Connect VCC Port to Pin-20 (VCC) of ICBase-3 (74LS00).
  7. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS00).
  8. Connect Pin-7 (Ground) of ICBase-2 (74LS00) to GND Port.
  9. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS00).
  10. Connect Input-14 to Pin-1 (Input) of ICBase-1 (74LS00).
  11. Connect Input-14 to Pin-2 (Input) of ICBase-1 (74LS00).
  12. Connect Input-13 to Pin-1 (Input) of ICBase-2 (74LS00).
  13. Connect Pin-2 (Input) of ICBase-2 (74LS00) to Input-13.
  14. Connect Pin-1 (Input) of ICBase-3 (74LS00) to Pin-3 (Output) of ICBase-1 (74LS00).
  15. Connect Pin-2 (Input) of ICBase-3 (74LS00) to Pin-3 (Output) of ICBase-2 (74LS00).
  16. Connect Output-3 to Pin-3 (Output) of ICBase-3 (74LS00).