Study Resources
Circuit Tutorials
Trainer Kit
Help
Login
Profile
Sign Out
AYUSH KUMAR
BHARATI VIDYAPEETH (DU) COLLEGE OF ENGINEERING, PUNE • Computer
3 Circuits
deriving using nand gate (final)
AYUSH KUMAR
0
0
Oct 2, 2024
74LS00
74LS10
half adder
AYUSH KUMAR
0
0
Sep 23, 2024
74LS08
74LS32
74LS04
PBL DE
AYUSH KUMAR
0
0
Sep 11, 2024
74LS08
74LS32
74LS04
Page 1
1
Welcome back! Please sign in to your account.
Email
Invalid email address
Password
Password must be at least 8 characters long
Log in
Don't have an account?
Forgot password?
Create your account to get started with DeldSim.
Name
Name is required
Email Address
Invalid email address
Password
Password must be at least 8 characters long
Institution Name
Branch
Information Technology
Computer
Electronics and Telecommunication
Electronics
Mechanical
Civil
Other
I accept the
terms and conditions
Register
Already have an account?
Log in here
Enter your registered email address below and we'll send you a link to reset your password.
Email
Invalid email address
Reset My Password
← Back to login
