KASHMIRA PATIL

DR. VISHWANATH KARAD MIT WORLD PEACE UNIVERSITY, PUNE • Computer

12 Circuits

7476 single flip flop

7476 single flip flop

2 bit asynchronous up counter

2 bit asynchronous up counter

3 bit asynchronous up counter - Copy

3 bit asynchronous up counter - Copy

8:1 reduction method

8:1 reduction method

MUX-1 half adder using mux

MUX-1 half adder using mux

8:1 multiplexer

8:1 multiplexer

implementation of logic expression in 8:1

implementation of logic expression in 8:1

GRAY TO BINARY

GRAY TO BINARY

BINARY TO GRAY

BINARY TO GRAY

full adder

full adder

74LS08 74LS86 74LS32

half adder using NAND gate

half adder using NAND gate

XOR gate

XOR gate

74LS04 74LS08 74LS32

Page 1

1