Indrayani 5

Indrayani
Indrayani Gaidhane
• Created on Sep 14, 2023 • 0 • 0 • 1
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Indrayani 5
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Integrated Circuits Used

74LS00

Description

Implementation of OR GATE using NAND GATE

Procedure

  1. Add IC 74LS00 into ICBase-2 (74LS00).
  2. Connect Pin-20 (VCC) of ICBase-2 (74LS00) to VCC Port.
  3. Connect Pin-7 (Ground) of ICBase-2 (74LS00) to GND Port.
  4. Connect Pin-1 (Input) of ICBase-2 (74LS00) to Input-10.
  5. Connect Pin-2 (Input) of ICBase-2 (74LS00) to Input-10.
  6. Connect Pin-19 (Input) of ICBase-2 (74LS00) to Pin-3 (Output) of ICBase-2 (74LS00).
  7. Connect Pin-4 (Input) of ICBase-2 (74LS00) to Input-9.
  8. Connect Pin-5 (Input) of ICBase-2 (74LS00) to Input-9.
  9. Connect Pin-18 (Input) of ICBase-2 (74LS00) to Pin-6 (Output) of ICBase-2 (74LS00).
  10. Connect Output-6 to Pin-17 (Output) of ICBase-2 (74LS00).