Divyaj Chhajed

Divyaj
Divyaj Chhajed
• Created on Sep 14, 2023 • 0 • 0 • 1
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Divyaj Chhajed
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Integrated Circuits Used

74LS00

Description

Implementation of OR Gate using NAND Gate

Procedure

  1. Add IC 74LS00 into ICBase-2 (74LS00).
  2. Connect Pin-17 (Output) of ICBase-2 (74LS00) to Output-9.
  3. Connect Pin-1 (Input) of ICBase-2 (74LS00) to Input-10.
  4. Connect Pin-2 (Input) of ICBase-2 (74LS00) to Input-10.
  5. Connect Pin-4 (Input) of ICBase-2 (74LS00) to Input-8.
  6. Connect Pin-5 (Input) of ICBase-2 (74LS00) to Input-8.
  7. Connect Pin-19 (Input) of ICBase-2 (74LS00) to Pin-3 (Output) of ICBase-2 (74LS00).
  8. Connect Pin-18 (Input) of ICBase-2 (74LS00) to Pin-6 (Output) of ICBase-2 (74LS00).
  9. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS00).
  10. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS00).