tut 4

Ashutosh
Ashutosh Korde
Created on Oct 1, 2023 0 0 1
tut 4
100%

Integrated Circuits Used

Description

half subtractor using NAND gate

Procedure

  1. Add IC 74LS03 into ICBase-2 (74LS03).
  2. Add IC 74LS03 into ICBase-3 (74LS03).
  3. Connect Pin-20 (VCC) of ICBase-2 (74LS03) to VCC Port.
  4. Connect Pin-20 (VCC) of ICBase-3 (74LS03) to VCC Port.
  5. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS03).
  6. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS03).
  7. Connect Pin-1 (Input) of ICBase-2 (74LS03) to Input-15.
  8. Connect Pin-2 (Input) of ICBase-2 (74LS03) to Input-14.
  9. Connect Pin-19 (Input) of ICBase-2 (74LS03) to Pin-3 (Output) of ICBase-2 (74LS03).
  10. Connect Pin-18 (Input) of ICBase-2 (74LS03) to Input-15.
  11. Connect Pin-16 (Input) of ICBase-2 (74LS03) to Pin-3 (Output) of ICBase-2 (74LS03).
  12. Connect Pin-15 (Input) of ICBase-2 (74LS03) to Input-14.
  13. Connect Pin-1 (Input) of ICBase-3 (74LS03) to Pin-17 (Output) of ICBase-2 (74LS03).
  14. Connect Pin-2 (Input) of ICBase-3 (74LS03) to Pin-14 (Output) of ICBase-2 (74LS03).
  15. Connect Output-9 to Pin-3 (Output) of ICBase-3 (74LS03).
  16. Connect Pin-4 (Input) of ICBase-3 (74LS03) to Pin-14 (Output) of ICBase-2 (74LS03).
  17. Connect Pin-5 (Input) of ICBase-3 (74LS03) to Pin-14 (Output) of ICBase-2 (74LS03).
  18. Connect Output-8 to Pin-6 (Output) of ICBase-3 (74LS03).
  19. Connect Pin-16 (Input) of ICBase-2 (74LS03) to ICBase-2 (74LS03).