sr flip flop

Garima
Garima Purohit
• Created on Nov 8, 2023 • 0 • 0 • 1
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sr flip flop
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Integrated Circuits Used

74LS00

Description

sr flip flop with latch

Procedure

  1. Add IC 74LS00 into ICBase-1 (74LS00).
  2. Add IC 74LS00 into ICBase-2 (74LS00).
  3. Connect Pin-20 (VCC) of ICBase-1 (74LS00) to VCC Port.
  4. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS00).
  5. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS00).
  6. Connect Pin-20 (VCC) of ICBase-2 (74LS00) to VCC Port.
  7. Connect Input-1 to Pin-1 (Input) of ICBase-1 (74LS00).
  8. Connect Pin-2 (Input) of ICBase-1 (74LS00) to Clock port of 1Hz frequency.
  9. Connect Pin-1 (Input) of ICBase-2 (74LS00) to Pin-3 (Output) of ICBase-1 (74LS00).
  10. Connect Output-1 to Pin-3 (Output) of ICBase-2 (74LS00).
  11. Connect Output-0 to Pin-6 (Output) of ICBase-2 (74LS00).
  12. Connect Clock port of 1Hz frequency to Pin-4 (Input) of ICBase-1 (74LS00).
  13. Connect Input-0 to Pin-5 (Input) of ICBase-1 (74LS00).
  14. Connect Pin-5 (Input) of ICBase-2 (74LS00) to Pin-6 (Output) of ICBase-1 (74LS00).
  15. Connect Pin-2 (Input) of ICBase-2 (74LS00) to Pin-6 (Output) of ICBase-2 (74LS00).
  16. Connect Pin-4 (Input) of ICBase-2 (74LS00) to Pin-3 (Output) of ICBase-2 (74LS00).
  17. Connect VCC Port to ICBase-2 (74LS00).