9 experiment SR flip flop

Ritik
Ritik Sharma
• Created on May 5, 2023 • 0 • 0 • 1
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9 experiment SR flip flop
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Integrated Circuits Used

74LS00

Description

SR flip flop

Procedure

  1. Add IC 74LS00 into ICBase-3 (74LS00).
  2. Connect Pin-20 (VCC) of ICBase-3 (74LS00) to VCC Port.
  3. Connect Pin-7 (Ground) of ICBase-3 (74LS00) to GND Port.
  4. Connect Pin-1 (Input) of ICBase-3 (74LS00) to Input-6.
  5. Connect Pin-4 (Input) of ICBase-3 (74LS00) to Input-5.
  6. Connect Pin-2 (Input) of ICBase-3 (74LS00) to Clock port of 1Hz frequency.
  7. Connect Pin-5 (Input) of ICBase-3 (74LS00) to Clock port of 1Hz frequency.
  8. Connect Pin-18 (Input) of ICBase-3 (74LS00) to Pin-3 (Output) of ICBase-3 (74LS00).
  9. Connect Pin-15 (Input) of ICBase-3 (74LS00) to Pin-6 (Output) of ICBase-3 (74LS00).
  10. Connect Pin-19 (Input) of ICBase-3 (74LS00) to Pin-14 (Output) of ICBase-3 (74LS00).
  11. Connect Pin-16 (Input) of ICBase-3 (74LS00) to Pin-17 (Output) of ICBase-3 (74LS00).
  12. Connect Output-1 to Pin-17 (Output) of ICBase-3 (74LS00).
  13. Connect Output-0 to Pin-14 (Output) of ICBase-3 (74LS00).