SR LATCH WITH NOR

mohammed
mohammed junaid
• Created on Mar 29, 2023 • 0 • 0 • 1
SR LATCH WITH NOR
100%

Integrated Circuits Used

Description

1 0 10 0 0 10 after s=1 ,R=0 01 01 00 01 after S=0,R=1 11 00 forbidden

Procedure

  1. Add IC 74LS02 into ICBase-1 (74LS02).
  2. Connect Input-15 to Pin-2 (Input) of ICBase-1 (74LS02).
  3. Connect Input-14 to Pin-6 (Input) of ICBase-1 (74LS02).
  4. Connect Pin-4 (Output) of ICBase-1 (74LS02) to Pin-3 (Input) of ICBase-1 (74LS02).
  5. Connect Pin-1 (Output) of ICBase-1 (74LS02) to Pin-5 (Input) of ICBase-1 (74LS02).
  6. Connect Output-13 to Pin-1 (Output) of ICBase-1 (74LS02).
  7. Connect Output-12 to Pin-4 (Output) of ICBase-1 (74LS02).
  8. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS02).
  9. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS02).