Assignment 4.1

Nimisha
Nimisha James
• Created on May 15, 2023 • 0 • 0 • 2
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Assignment 4.1
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Integrated Circuits Used

74LS76 74LS04

Description

JK to D Flip Flop

Procedure

  1. Add IC 74LS76 into ICBase-3 (74LS76).
  2. Add IC 74LS04 into ICBase-2 (74LS04).
  3. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS04).
  4. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS04).
  5. Connect VCC Port to Pin-5 (VCC) of ICBase-3 (74LS76).
  6. Connect Pin-17 (Ground) of ICBase-3 (74LS76) to GND Port.
  7. Connect Input-8 to Pin-2 (Input) of ICBase-3 (74LS76).
  8. Connect Input-7 to Pin-3 (Input) of ICBase-3 (74LS76).
  9. Connect Input-5 to Pin-4 (Input) of ICBase-3 (74LS76).
  10. Connect Pin-1 (Input) of ICBase-2 (74LS04) to Input-5.
  11. Connect Pin-20 (Input) of ICBase-3 (74LS76) to Pin-2 (Output) of ICBase-2 (74LS04).
  12. Connect Manual clock Port to Pin-1 (Input) of ICBase-3 (74LS76).
  13. Connect Pin-19 (Output) of ICBase-3 (74LS76) to Output-0.
  14. Connect Output-1 to Pin-18 (Output) of ICBase-3 (74LS76).
  15. Connect GND Port to ICBase-2 (74LS04).
  16. Connect GND Port to ICBase-3 (74LS76).
  17. Connect Output-0 to ICBase-3 (74LS76).