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Shreeyash Jagtap
DR. VISHWANATH KARAD MIT WORLD PEACE UNIVERSITY, PUNE • Computer
21 Circuits
Full adder - Copy
Shreeyash Jagtap
0
0
May 9, 2023
74LS04
74LS153
4:1 multiplexer using 153
Shreeyash Jagtap
0
0
May 7, 2023
74LS153
8:1 mux 0 2 4 7 - Copy
Shreeyash Jagtap
0
0
May 7, 2023
74LS153
74LS04
74LS32
pos - Copy
Shreeyash Jagtap
0
0
May 7, 2023
74LS153
ms jk flip flop
Shreeyash Jagtap
0
0
May 7, 2023
74LS76
gray to binary
Shreeyash Jagtap
0
0
May 7, 2023
74LS86
sop truth table verification - Copy
Shreeyash Jagtap
0
0
May 7, 2023
74LS151
8:1 multiplexer 153
Shreeyash Jagtap
0
0
May 7, 2023
74LS153
binary to gray
Shreeyash Jagtap
0
0
May 7, 2023
74LS86
2 BIT ASYNCHRONOUS UP COUNTER 74LS76 - Copy
Shreeyash Jagtap
0
0
May 7, 2023
74LS76
2 BIT ASYNCHRONOUS DOWN COUNTER 74LS76 - Copy
Shreeyash Jagtap
0
0
May 7, 2023
74LS76
full subtractor - Copy
Shreeyash Jagtap
0
0
May 7, 2023
74LS151
half subtractor - Copy
Shreeyash Jagtap
0
0
May 7, 2023
74LS86
74LS08
74LS02
half adder - Copy
Shreeyash Jagtap
0
0
May 7, 2023
74LS86
74LS08
3 BIT ASYNCHRONOUS UP COUNTER 74LS76 - Copy
Shreeyash Jagtap
0
0
May 7, 2023
74LS76
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