EXPERIMENT NO 6

Gaurang
Gaurang Kanbur
• Created on Dec 24, 2022 • 0 • 0 • 2
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EXPERIMENT NO 6
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Integrated Circuits Used

74LS76 74LS08

Description

SYNCHRONOUS DOWN COUNTER

Procedure

  1. Add IC 74LS76 into ICBase-1 (74LS76).
  2. Add IC 74LS76 into ICBase-2 (74LS76).
  3. Add IC 74LS08 into ICBase-3 (74LS08).
  4. Connect VCC Port to Pin-5 (VCC) of ICBase-1 (74LS76).
  5. Connect VCC Port to Pin-5 (VCC) of ICBase-2 (74LS76).
  6. Connect GND Port to Pin-17 (Ground) of ICBase-2 (74LS76).
  7. Connect GND Port to Pin-17 (Ground) of ICBase-1 (74LS76).
  8. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS08).
  9. Connect VCC Port to Pin-20 (VCC) of ICBase-3 (74LS08).
  10. Connect Clock port of 1Hz frequency to Pin-1 (Input) of ICBase-1 (74LS76).
  11. Connect Clock port of 1Hz frequency to Pin-6 (Input) of ICBase-1 (74LS76).
  12. Connect Clock port of 1Hz frequency to Pin-1 (Input) of ICBase-2 (74LS76).