j k flip floop

rushikesh
rushikesh pawar
• Created on Jan 10, 2023 • 0 • 0 • 1
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j k flip floop
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Integrated Circuits Used

74LS76

Description

dsm lab

Procedure

  1. Add IC 74LS76 into ICBase-1 (74LS76).
  2. Connect Pin-5 (VCC) of ICBase-1 (74LS76) to VCC Port.
  3. Connect GND Port to Pin-17 (Ground) of ICBase-1 (74LS76).
  4. Connect Pin-16 (Input) of ICBase-1 (74LS76) to Input-0.
  5. Connect Input-1 to Pin-20 (Input) of ICBase-1 (74LS76).
  6. Connect Pin-19 (Output) of ICBase-1 (74LS76) to Output-0.
  7. Connect Pin-18 (Output) of ICBase-1 (74LS76) to Output-1.
  8. Connect Pin-15 (Output) of ICBase-1 (74LS76) to Output-3.
  9. Connect Pin-14 (Output) of ICBase-1 (74LS76) to Output-4.
  10. Connect Input-4 to Pin-13 (Input) of ICBase-1 (74LS76).
  11. Connect Input-5 to Pin-4 (Input) of ICBase-1 (74LS76).
  12. Connect Input-14 to Pin-7 (Input) of ICBase-1 (74LS76).
  13. Connect Input-15 to Pin-2 (Input) of ICBase-1 (74LS76).
  14. Connect Input-9 to Pin-3 (Input) of ICBase-1 (74LS76).
  15. Connect Input-8 to Pin-8 (Input) of ICBase-1 (74LS76).
  16. Connect Clock port of 1Hz frequency to Pin-1 (Input) of ICBase-1 (74LS76).
  17. Connect Clock port of 1Hz frequency to Pin-6 (Input) of ICBase-1 (74LS76).