AND-NOT

K R
K R DHEVESH
• Created on Nov 12, 2022 • 0 • 0 • 2
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AND-NOT
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Integrated Circuits Used

74LS08 74LS04

Description

IT WILL EXPLAIN THE CHARACTERISTICS OF AND AND NOT GATE

Procedure

  1. Add IC 74LS08 into ICBase-3 (74LS08).
  2. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS08).
  3. Connect VCC Port to Pin-20 (VCC) of ICBase-3 (74LS08).
  4. Connect Input-6 to Pin-1 (Input) of ICBase-3 (74LS08).
  5. Connect Input-5 to Pin-2 (Input) of ICBase-3 (74LS08).
  6. Connect Output-1 to Pin-3 (Output) of ICBase-3 (74LS08).
  7. Add IC 74LS04 into ICBase-4 (74LS04).
  8. Connect GND Port to Pin-7 (Ground) of ICBase-4 (74LS04).
  9. Connect VCC Port to Pin-20 (VCC) of ICBase-4 (74LS04).
  10. Connect Input-0 to Pin-1 (Input) of ICBase-4 (74LS04).
  11. Connect Output-0 to Pin-2 (Output) of ICBase-4 (74LS04).