S R Latch NAND

akhil
akhil chennupati
• Created on Nov 9, 2022 • 0 • 0 • 1
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S R Latch NAND
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Integrated Circuits Used

74LS00

Procedure

  1. Add IC 74LS00 into ICBase-1 (74LS00).
  2. Connect Pin-1 (Input) of ICBase-1 (74LS00) to Input-15.
  3. Connect Output-15 to Pin-3 (Output) of ICBase-1 (74LS00).
  4. Connect Pin-3 (Output) of ICBase-1 (74LS00) to Pin-4 (Input) of ICBase-1 (74LS00).
  5. Connect Input-14 to Pin-5 (Input) of ICBase-1 (74LS00).
  6. Connect Output-14 to Pin-6 (Output) of ICBase-1 (74LS00).
  7. Connect Pin-6 (Output) of ICBase-1 (74LS00) to Pin-2 (Input) of ICBase-1 (74LS00).
  8. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS00).
  9. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS00).