SREEDEV C S

GOVERNMENT ENGINEERING COLLEGE, THRISSUR • Computer

24 Circuits

basic Sr flipflop

basic Sr flipflop

JK by JQ'+K'Q

JK by JQ'+K'Q

74LS04 74LS08 74LS32

F=0,2,3,5,6 using 8*1(two 4*1)

F=0,2,3,5,6 using 81(two 41)

74LS153 74LS04 74LS32

1*4 demux using basic gates

1*4 demux using basic gates

F(A,B)=0,2,3 using mux variety

F(A,B)=0,2,3 using mux variety

S-R flipflop using NAND

S-R flipflop using NAND

Adder Subtractor

Adder Subtractor

74LS86 74LS08 74LS32 74LS04

4*1 mux using basic gates

4*1 mux using basic gates

74LS08 74LS32 74LS04

JK using NAND

JK using NAND

F(A,B)=0,2,3 using mux variety

F(A,B)=0,2,3 using mux variety

F=(1,4,5,6) using 4*1 MUX

F=(1,4,5,6) using 4*1 MUX

F=0,2,3,6,7 using 4*1 mux C as Sinput

F=0,2,3,6,7 using 4*1 mux C as Sinput

Shift right using D

Shift right using D

Ring Counter D

Ring Counter D

Johnsons counter using D

Johnsons counter using D

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