D Flip Flop

Sourav
Sourav Kisku
• Created on Jan 27, 2025 • 0 • 0 • 2
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D Flip Flop
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Integrated Circuits Used

74LS00 74LS04

Description

A D (or Delay) Flip Flop (Figure 1) is a digital electronic circuit used to delay the change of state of its output signal (Q) until the next rising edge of a clock timing input signal occurs.

Procedure

  1. Add IC 74LS00 into ICBase-2 (74LS00).
  2. Add IC 74LS04 into ICBase-3 (74LS04).
  3. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS00).
  4. Connect VCC Port to Pin-20 (VCC) of ICBase-3 (74LS04).
  5. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS00).
  6. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS04).
  7. Connect Pin-1 (Input) of ICBase-2 (74LS00) to Input-10.
  8. Connect Pin-1 (Input) of ICBase-3 (74LS04) to Input-10.
  9. Connect Pin-2 (Input) of ICBase-2 (74LS00) to Input-7.
  10. Connect Pin-4 (Input) of ICBase-2 (74LS00) to Input-7.
  11. Connect Pin-5 (Input) of ICBase-2 (74LS00) to Pin-2 (Output) of ICBase-3 (74LS04).
  12. Connect Pin-19 (Input) of ICBase-2 (74LS00) to Pin-3 (Output) of ICBase-2 (74LS00).
  13. Connect Pin-16 (Input) of ICBase-2 (74LS00) to Pin-6 (Output) of ICBase-2 (74LS00).
  14. Connect Output-2 to Pin-17 (Output) of ICBase-2 (74LS00).
  15. Connect Output-1 to Pin-14 (Output) of ICBase-2 (74LS00).
  16. Connect Pin-18 (Input) of ICBase-2 (74LS00) to Pin-14 (Output) of ICBase-2 (74LS00).
  17. Connect Pin-15 (Input) of ICBase-2 (74LS00) to Pin-17 (Output) of ICBase-2 (74LS00).