NAND GATE VERIFICATION

Rayalla
Rayalla Chaithanya sai kumar
• Created on Jan 17, 2022 • 0 • 0 • 1
NAND GATE VERIFICATION
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Integrated Circuits Used

Procedure

  1. Add IC 74LS03 into ICBase-3 (74LS03).
  2. Connect Input-0 to Pin-1 (Input) of ICBase-3 (74LS03).
  3. Connect Pin-2 (Input) of ICBase-3 (74LS03) to Input-1.
  4. Connect Output-0 to Pin-3 (Output) of ICBase-3 (74LS03).
  5. Connect VCC Port to Pin-20 (VCC) of ICBase-3 (74LS03).
  6. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS03).