END-Term Even Parity Generator

Bhushan
Bhushan Patil
• Created on Jan 19, 2022 • 0 • 0 • 1
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END-Term Even Parity Generator
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Integrated Circuits Used

74LS86

Description

Used EX-OR gate to implement even-parity generator

Procedure

  1. Add IC 74LS86 into ICBase-3 (74LS86).
  2. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS86).
  3. Connect Pin-20 (VCC) of ICBase-3 (74LS86) to VCC Port.
  4. Connect Input-0 to Pin-1 (Input) of ICBase-3 (74LS86).
  5. Connect Input-1 to Pin-2 (Input) of ICBase-3 (74LS86).
  6. Connect Input-2 to Pin-4 (Input) of ICBase-3 (74LS86).
  7. Connect Pin-5 (Input) of ICBase-3 (74LS86) to Pin-3 (Output) of ICBase-3 (74LS86).
  8. Connect Output-0 to Pin-6 (Output) of ICBase-3 (74LS86).