lab report 2.14

Miraj
Miraj Alvee
• Created on Nov 4, 2021 • 0 • 0 • 2
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lab report 2.14
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Integrated Circuits Used

74LS08 74LS04

Description

What will happen if we connect a AND gate with two consecutive NOT gate?

Procedure

  1. Add IC 74LS08 into ICBase-1 (74LS08).
  2. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS08).
  3. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS08).
  4. Connect Pin-1 (Input) of ICBase-1 (74LS08) to Input-15.
  5. Connect Input-14 to Pin-2 (Input) of ICBase-1 (74LS08).
  6. Connect Input-15 to ICBase-1 (74LS08).
  7. Connect Output-13 to ICBase-1 (74LS08).
  8. Add IC 74LS04 into ICBase-2 (74LS04).
  9. Connect Pin-1 (Input) of ICBase-2 (74LS04) to Pin-3 (Output) of ICBase-1 (74LS08).
  10. Connect Pin-2 (Output) of ICBase-3 (74LS04) to ICBase-2 (74LS04).
  11. Add IC 74LS04 into ICBase-3 (74LS04).
  12. Connect Pin-1 (Input) of ICBase-3 (74LS04) to Pin-2 (Output) of ICBase-2 (74LS04).
  13. Connect Output-13 to Pin-2 (Output) of ICBase-3 (74LS04).
  14. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS04).
  15. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS04).
  16. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS04).
  17. Connect VCC Port to Pin-20 (VCC) of ICBase-3 (74LS04).
  18. Connect Pin-2 (Output) of ICBase-2 (74LS04) to ICBase-3 (74LS04).