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Susmit Garudkar
PIMPRI CHINCHWAD COLLEGE OF ENGINEERING • Computer
41 Circuits
16:1 Reduction using the 8:1 multiplexer
Susmit Garudkar
0
0
Jan 12, 2022
74LS04
74LS151
Even parity
Susmit Garudkar
0
0
Jan 12, 2022
74LS86
Odd parity
Susmit Garudkar
0
0
Jan 12, 2022
74LS04
74LS86
Odd parity
Susmit Garudkar
0
0
Jan 12, 2022
74LS86
74LS04
JK to D flipflop
Susmit Garudkar
0
0
Jan 12, 2022
74LS76
74LS04
Jk to T Flipflop
Susmit Garudkar
0
0
Jan 12, 2022
74LS76
Jk to T Flipflop
Susmit Garudkar
0
0
Jan 12, 2022
74LS76
FULL ADDER USING NAND GATES
Susmit Garudkar
0
0
Dec 24, 2021
74LS00
half adder using basic gates
Susmit Garudkar
0
0
Dec 23, 2021
74LS08
half adder using NAND gates
Susmit Garudkar
0
0
Dec 23, 2021
74LS00
half adder using basic gates
Susmit Garudkar
0
0
Dec 23, 2021
74LS86
74LS08
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