A7 Conversion of JK to D FF

Sarthak
Sarthak Zambre
• Created on Jan 19, 2022 • 0 • 0 • 2
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A7 Conversion of JK to D FF
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Integrated Circuits Used

74LS76 74LS04

Description

JK to D Flip Flop Input 0 then Output 0 Input 1 then Output 1

Procedure

  1. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS04).
  2. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS04).
  3. Connect VCC Port to Pin-5 (VCC) of ICBase-1 (74LS76).
  4. Connect GND Port to Pin-17 (Ground) of ICBase-1 (74LS76).
  5. Connect Input-0 to Pin-4 (Input) of ICBase-1 (74LS76).
  6. Connect Input-0 to Pin-1 (Input) of ICBase-2 (74LS04).
  7. Connect Pin-20 (Input) of ICBase-1 (74LS76) to Pin-2 (Output) of ICBase-2 (74LS04).
  8. Connect Output-0 to Pin-19 (Output) of ICBase-1 (74LS76).
  9. Connect VCC Port to Pin-2 (Input) of ICBase-1 (74LS76).
  10. Connect VCC Port to Pin-3 (Input) of ICBase-1 (74LS76).
  11. Connect VCC Port to Pin-8 (Input) of ICBase-1 (74LS76).
  12. Connect VCC Port to Pin-7 (Input) of ICBase-1 (74LS76).
  13. Connect Output-3 to Pin-18 (Output) of ICBase-1 (74LS76).
  14. Connect Manual clock Port to Pin-1 (Input) of ICBase-1 (74LS76).
  15. Add IC 74LS76 into ICBase-1 (74LS76).
  16. Add IC 74LS04 into ICBase-2 (74LS04).