Parity generator(odd)

Shreya
Shreya Mande
• Created on Jan 16, 2022 • 0 • 0 • 2
Parity generator(odd)
100%

Integrated Circuits Used

Procedure

  1. Connect Input-9 to Pin-1 (Input) of ICBase-2 (74LS86).
  2. Connect Input-8 to Pin-2 (Input) of ICBase-2 (74LS86).
  3. Connect Pin-4 (Input) of ICBase-2 (74LS86) to Pin-3 (Output) of ICBase-2 (74LS86).
  4. Connect Input-7 to Pin-5 (Input) of ICBase-2 (74LS86).
  5. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS86).
  6. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS86).
  7. Connect Pin-1 (Input) of ICBase-3 (74LS04) to Pin-6 (Output) of ICBase-2 (74LS86).
  8. Connect Output-6 to Pin-2 (Output) of ICBase-3 (74LS04).
  9. Connect VCC Port to Pin-20 (VCC) of ICBase-3 (74LS04).
  10. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS04).
  11. Add IC 74LS86 into ICBase-2 (74LS86).
  12. Add IC 74LS04 into ICBase-3 (74LS04).