EVEN PARITY GENERATOR

Suraj
Suraj Tade
• Created on Dec 31, 2021 • 0 • 0 • 1
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EVEN PARITY GENERATOR
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Integrated Circuits Used

74LS86

Description

2-EXOR GATES

Procedure

  1. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS86).
  2. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS86).
  3. Connect Pin-1 (Input) of ICBase-1 (74LS86) to Input-15.
  4. Connect Pin-2 (Input) of ICBase-1 (74LS86) to Input-14.
  5. Connect Pin-4 (Input) of ICBase-1 (74LS86) to Pin-3 (Output) of ICBase-1 (74LS86).
  6. Connect Input-13 to Pin-5 (Input) of ICBase-1 (74LS86).
  7. Connect Output-12 to Pin-6 (Output) of ICBase-1 (74LS86).
  8. Add IC 74LS86 into ICBase-1 (74LS86).