ROHITH GOWDA G D

Arjun
Arjun G T
• Created on Jan 10, 2022 • 0 • 0 • 2
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ROHITH GOWDA G D
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Integrated Circuits Used

74LS86 74LS04

Description

EXP 6 4 BIT ODD PARITY

Procedure

  1. Add IC 74LS86 into ICBase-1 (74LS86).
  2. Add IC 74LS04 into ICBase-2 (74LS04).
  3. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS86).
  4. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS04).
  5. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS86).
  6. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS04).
  7. Connect Pin-1 (Input) of ICBase-1 (74LS86) to Input-0.
  8. Connect Pin-2 (Input) of ICBase-1 (74LS86) to Input-1.
  9. Connect Pin-1 (Input) of ICBase-2 (74LS04) to Pin-3 (Output) of ICBase-1 (74LS86).
  10. Connect Input-3 to Output-3.
  11. Connect Pin-4 (Input) of ICBase-1 (74LS86) to Input-2.
  12. Connect Pin-5 (Input) of ICBase-1 (74LS86) to Input-3.
  13. Connect Pin-16 (Input) of ICBase-1 (74LS86) to Pin-3 (Output) of ICBase-1 (74LS86).
  14. Connect Pin-15 (Input) of ICBase-1 (74LS86) to Pin-6 (Output) of ICBase-1 (74LS86).
  15. Connect VCC Port to ICBase-2 (74LS04).