E_55_SAUMIYA _Full Adder - Design using Reduction

Saumiya
Saumiya Rajendran
Created on Aug 25, 2021 0 0 2
E_55_SAUMIYA _Full Adder - Design using Reduction
100%

Integrated Circuits Used

Procedure

  1. Connect GND Port to Pin-1 (Input) of ICBase-2 (74LS04).
  2. Connect Input-1 to Pin-2 (Output) of ICBase-2 (74LS04).
  3. Connect Input-2 to Pin-3 (Input) of ICBase-2 (74LS04).
  4. Connect Pin-2 (Output) of ICBase-3 (74LS04) to Pin-4 (Output) of ICBase-2 (74LS04).
  5. Connect GND Port to Pin-5 (Input) of ICBase-2 (74LS04).
  6. Connect Output-1 to Pin-7 (Ground) of ICBase-2 (74LS04).
  7. Connect GND Port to Pin-8 (Input & Output) of ICBase-2 (74LS04).
  8. Connect VCC Port to Pin-6 (Output) of ICBase-2 (74LS04).
  9. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS04).
  10. Connect VCC Port to Pin-20 (VCC) of ICBase-3 (74LS04).
  11. Connect VCC Port to Pin-17 (Input) of ICBase-2 (74LS04).
  12. Connect Input-0 to Pin-18 (Output) of ICBase-2 (74LS04).
  13. Connect Input-2 to Pin-16 (Output) of ICBase-2 (74LS04).
  14. Connect GND Port to Pin-14 (Output) of ICBase-2 (74LS04).
  15. Connect Output-0 to Pin-13 (Input & Output) of ICBase-2 (74LS04).
  16. Connect Input-2 to Pin-15 (Input) of ICBase-2 (74LS04).
  17. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS04).
  18. Connect Input-2 to Pin-6 (Output) of ICBase-2 (74LS04).
  19. Add IC 74LS04 into ICBase-2 (74LS04).
  20. Add IC 74LS153 into ICBase-1 (74LS153).
  21. Add IC 74LS04 into ICBase-3 (74LS04).