Rashi Bansal

DR. VISHWANATH KARAD MIT WORLD PEACE UNIVERSITY, PUNE • Computer

33 Circuits

assign 3 : mod 5 asynch up

assign 3 : mod 5 asynch up

assign 2 : B) half adder

assign 2 : B) half adder

assign 2: C) reduction method - Copy

assign 2: C) reduction method - Copy

assign 2 : sop and pos

assign 2 : sop and pos

assign 3 :1) mod 8 asynch up counter

assign 3 :1) mod 8 asynch up counter

assign3:2) mod 8 asynchronous down counter

assign3:2) mod 8 asynchronous down counter

assign 4: synchronous down counter

assign 4: synchronous down counter

assign2 : C: REDUCTION METHOD

assign2 : C: REDUCTION METHOD

assign 4 : 1)synch up counter

assign 4 : 1)synch up counter

assign 1: Binary to gray

assign 1: Binary to gray

assign1 : gray to binary

assign1 : gray to binary

assign 2: 1)verify truth table

assign 2: 1)verify truth table

assign2: 2) sop and pos

assign2: 2) sop and pos

a2 - Copy

a2 - Copy

up counter

up counter

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