AND OR NOT GATES

Shamika
Shamika Chalse
Created on Aug 6, 2021 0 0 3
AND OR NOT GATES
100%

Integrated Circuits Used

Procedure

  1. Add IC 74LS08 into ICBase-1 (74LS08).
  2. Add IC 74LS32 into ICBase-2 (74LS32).
  3. Add IC 74LS04 into ICBase-3 (74LS04).
  4. Connect Output-9 to Pin-17 (Output) of ICBase-1 (74LS08).
  5. Connect Input-10 to Pin-18 (Input) of ICBase-1 (74LS08).
  6. Connect Input-9 to Pin-19 (Input) of ICBase-1 (74LS08).
  7. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS08).
  8. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS08).
  9. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS32).
  10. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS32).
  11. Connect Output-2 to Pin-14 (Output) of ICBase-2 (74LS32).
  12. Connect Input-4 to Pin-15 (Input) of ICBase-2 (74LS32).
  13. Connect Input-3 to Pin-16 (Input) of ICBase-2 (74LS32).
  14. Connect VCC Port to Pin-20 (VCC) of ICBase-3 (74LS04).
  15. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS04).
  16. Connect Output-1 to Pin-14 (Output) of ICBase-3 (74LS04).
  17. Connect Input-2 to Pin-15 (Input) of ICBase-3 (74LS04).