lab assig 3 JK Flip Flop practice

Shamika
Shamika Chalse
• Created on Sep 22, 2021 • 0 • 0 • 1
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lab assig 3 JK Flip Flop practice
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Integrated Circuits Used

74LS76

Procedure

  1. Add IC 74LS76 into ICBase-1 (74LS76).
  2. Connect VCC Port to Pin-5 (VCC) of ICBase-1 (74LS76).
  3. Connect GND Port to Pin-17 (Ground) of ICBase-1 (74LS76).
  4. Connect Clock port of 1Hz frequency to Pin-1 (Input) of ICBase-1 (74LS76).
  5. Connect VCC Port to Pin-2 (Input) of ICBase-1 (74LS76).
  6. Connect VCC Port to Pin-3 (Input) of ICBase-1 (74LS76).
  7. Connect Input-1 to Pin-4 (Input) of ICBase-1 (74LS76).
  8. Connect Input-0 to Pin-20 (Input) of ICBase-1 (74LS76).
  9. Connect Output-1 to Pin-19 (Output) of ICBase-1 (74LS76).
  10. Connect Output-0 to Pin-18 (Output) of ICBase-1 (74LS76).