Test JK Flip Flop

Viswas
Viswas Haridas
• Created on Aug 26, 2021 • 0 • 0 • 1
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Test JK Flip Flop
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Integrated Circuits Used

74LS76

Procedure

  1. Connect VCC Port to Pin-5 (VCC) of ICBase-3 (74LS76).
  2. Connect Pin-17 (Ground) of ICBase-3 (74LS76) to GND Port.
  3. Connect Input-15 to Pin-2 (Input) of ICBase-3 (74LS76).
  4. Connect Pin-3 (Input) of ICBase-3 (74LS76) to Input-14.
  5. Connect Input-0 to Pin-20 (Input) of ICBase-3 (74LS76).
  6. Add IC 74LS76 into ICBase-3 (74LS76).
  7. Connect Output-0 to Pin-18 (Output) of ICBase-3 (74LS76).
  8. Connect Output-1 to Pin-19 (Output) of ICBase-3 (74LS76).
  9. Connect Manual clock Port to Pin-1 (Input) of ICBase-3 (74LS76).
  10. Connect Input-1 to Pin-4 (Input) of ICBase-3 (74LS76).