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Akshit Mahaur
DR. VISHWANATH KARAD MIT WORLD PEACE UNIVERSITY, PUNE • Computer
15 Circuits
Sequence Decoder
Akshit Mahaur
0
0
Sep 29, 2021
74LS76
74LS08
74LS04
Test Evaluation - Full Adder using 3:8 Decoder
Akshit Mahaur
0
0
Sep 22, 2021
74LS138
74LS20
nothing
Akshit Mahaur
0
0
Sep 9, 2021
SYNCHRONOUS 3 bit COUNTER
Akshit Mahaur
0
0
Sep 1, 2021
74LS76
74LS08
MOD 5 RIPPLE COUNTER
Akshit Mahaur
0
0
Aug 25, 2021
74LS76
74LS00
3-bit asynchronous up counter
Akshit Mahaur
0
0
Aug 25, 2021
74LS76
FLIP FLOP IMPLEMENTATION
Akshit Mahaur
0
0
Aug 18, 2021
74LS76
Full Adder using 3:8 Decoder
Akshit Mahaur
0
0
Aug 18, 2021
74LS138
74LS20
DECODER
Akshit Mahaur
0
0
Aug 18, 2021
74LS138
DECODER NORMAL
Akshit Mahaur
0
0
Aug 18, 2021
74LS138
DUAL 4:1 MUX - Copy
Akshit Mahaur
0
0
Aug 11, 2021
74LS153
Reduction method 8:1
Akshit Mahaur
0
0
Aug 11, 2021
74LS153
DUAL 4:1 MUX - Copy
Akshit Mahaur
0
0
Aug 11, 2021
74LS153
DUAL 4:1 MUX
Akshit Mahaur
0
0
Aug 11, 2021
74LS153
8:1 MUX using 2 4:1 MUX
Akshit Mahaur
0
0
Aug 11, 2021
74LS153
74LS32
74LS04
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