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Rishabh Jain
DR. VISHWANATH KARAD MIT WORLD PEACE UNIVERSITY, PUNE • Computer
14 Circuits
Full Adder function using 3:8 Decoder IC 74LS138
Rishabh Jain
0
0
Sep 21, 2021
74LS138
3 bit Synchronous UP Counter
Rishabh Jain
0
0
Sep 21, 2021
74LS76
74LS08
Half Adder
Rishabh Jain
0
0
Sep 21, 2021
74LS04
74LS08
74LS32
4:1 MUX IC 74LS153
Rishabh Jain
0
0
Sep 21, 2021
74LS153
Lab 1
Rishabh Jain
0
0
Sep 21, 2021
74LS86
1/09/21 (2 bit)
Rishabh Jain
0
0
Sep 1, 2021
74LS76
1/09/21
Rishabh Jain
0
0
Sep 1, 2021
74LS76
74LS08
25/08/21
Rishabh Jain
0
0
Aug 25, 2021
74LS76
24/08/21 (2)
Rishabh Jain
0
0
Aug 25, 2021
18/08/21 2nd
Rishabh Jain
0
0
Aug 18, 2021
74LS138
74LS20
18/08/21 1st
Rishabh Jain
0
0
Aug 18, 2021
74LS138
74LS20
18/08/21 3rd
Rishabh Jain
0
0
Aug 18, 2021
74LS76
11/08/21
Rishabh Jain
0
0
Aug 11, 2021
74LS153
Gray to Binary
Rishabh Jain
0
0
Aug 4, 2021
74LS86
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