Astitwa Mishra

DR. VISHWANATH KARAD MIT WORLD PEACE UNIVERSITY, PUNE • Computer

15 Circuits

Half Adder

Half Adder

3 bit synchronous up counter

3 bit synchronous up counter

dgb

dgb

5 modulus 3 Bit up counter using Jk flipflops - Copy

5 modulus 3 Bit up counter using Jk flipflops - Copy

5 modulus 3 Bit up counter using Jk flipflops

5 modulus 3 Bit up counter using Jk flipflops

3 Bit up counter using Jk flipflops

3 Bit up counter using Jk flipflops

4:1 MUX full adder

4:1 MUX full adder

tyf

tyf

Full Adder with Sum and Carry using 4:1 MUX

Full Adder with Sum and Carry using 4:1 MUX

4:1 mux for Sop

4:1 mux for Sop

full adder from 4:1 mux - Copy

full adder from 4:1 mux - Copy

multiplexer SOP POS - Copy

multiplexer SOP POS - Copy

reduction method

reduction method

multiplexer SOP POS

multiplexer SOP POS

8 to 1 full adder using multiplex IC

8 to 1 full adder using multiplex IC

74LS153 74LS32 74LS04

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