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Srushti Mule
DR. VISHWANATH KARAD MIT WORLD PEACE UNIVERSITY, PUNE • Computer
10 Circuits
PC-54- FULL ADDER USING REDUCTION METHOD
Srushti Mule
0
0
Sep 21, 2021
74LS153
74LS04
PC 54- HALF ADDER
Srushti Mule
0
0
Sep 21, 2021
74LS153
74LS04
PC 54- POS & SOP
Srushti Mule
0
0
Sep 21, 2021
74LS153
PC 54- FULL ADDER USING DECODER
Srushti Mule
0
0
Sep 21, 2021
74LS20
74LS138
PC 54 (4 BIT)SYNC. DOWN COUNTER
Srushti Mule
0
0
Sep 21, 2021
74LS76
74LS08
PC 54 - HALF ADDER
Srushti Mule
0
0
Sep 21, 2021
74LS153
74LS04
PC 54 ASYNC. UP COUNTER
Srushti Mule
0
0
Sep 21, 2021
74LS76
PC 54 -ASYNC. DOWN COUNTER
Srushti Mule
0
0
Sep 21, 2021
74LS76
PC 54- SYNC. UP COUNTER
Srushti Mule
0
0
Sep 21, 2021
74LS76
74LS08
PC-54-Srushti_Bin-gray
Srushti Mule
0
0
Sep 19, 2021
74LS86
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